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Aleksey Baranov
2026-03-18 19:31:06 +03:00
parent 0e41fcb84e
commit f9aff44080
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4T4R FDD/DM - DMBPRD470101A.md
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@@ -20,12 +20,9 @@ Clock Distribution
1. Архитектура модуля:
1. Интерфейсы:
1. PAM Интерфейсный коннектор (2шт)
1. 20 pin connector (FX27-40S-0.8SV)
2. 3V8 - VSWRM
3. I2C_3V3
1. ADC (ADS1119IRTET) 0x40
2. MAX7315ATE+ 0x20
3. EEPROM CAT24C256WI-GT3 0x50
1. 40 pin connector (Solepin) аналог B1B7
2. 5V5
3. I2C Line
4. GPIO
1. FWD_SW_CTRL1_3V3
2. FWD_SW_CTRL2_3V3