From f9aff44080ac19c7b08c3f89b5ee43c5bd116658 Mon Sep 17 00:00:00 2001
From: Aleksey Baranov <al.baranov@yadro.com>
Date: Wed, 18 Mar 2026 19:31:06 +0300
Subject: [PATCH] vault backup: 2026-03-18 19:31:06

---
 4T4R FDD/DM - DMBPRD470101A.md | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/4T4R FDD/DM - DMBPRD470101A.md b/4T4R FDD/DM - DMBPRD470101A.md
index 5d731f4..dbbdfee 100644
--- a/4T4R FDD/DM - DMBPRD470101A.md	
+++ b/4T4R FDD/DM - DMBPRD470101A.md	
@@ -20,12 +20,9 @@ Clock Distribution
 1. Архитектура модуля:
 	1. Интерфейсы: 
 		1. PAM Интерфейсный коннектор (2шт)
-			1. 20 pin connector (FX27-40S-0.8SV)
-			2. 3V8 - VSWRM  
-			3. I2C_3V3
-				1. ADC (ADS1119IRTET) 0x40
-				2. MAX7315ATE+ 0x20
-				3. EEPROM CAT24C256WI-GT3 0x50
+			1. 40 pin connector (Solepin) аналог B1B7
+			2. 5V5  
+			3. I2C Line
 			4. GPIO 
 				1. FWD_SW_CTRL1_3V3
 				2. FWD_SW_CTRL2_3V3