diff --git a/BBU/Untitled.md b/BBU/Untitled.md new file mode 100644 index 0000000..13d8ad0 --- /dev/null +++ b/BBU/Untitled.md @@ -0,0 +1,244 @@ + +# STDRPI880001 Module Architecture + + + +## Overview + +The STDRPI880001 is a base board serving as the foundation for a test stand that manages and controls various daughter boards including UCBX86880001, UBBX86880001, FANCTL880001, IOBALR880001, IOBSYN880001, and BPLUNI880001. + + + +## Physical Architecture + + + +### Power Supply System + +- **Primary Power**: 12V external power supply with reverse polarity protection and input filtering + +- **Secondary Power Supplies**: + +  - 5V (6A) for Raspberry Pi and USB peripherals + +  - 3.3V (current determined during development) + +  - 1V (FPGA core voltage) + +  - 1.1V (switch voltage) + + + +### Board Integration + +- **Raspberry Pi 5**: Direct connection via flat cable to IDC connector (2x20 2.54mm pitch) + +- **FPGA**: GW2A-LV55PG484C8/I7 with external configuration PROM and connector for programming + +- **Ethernet Switch**: RTL8367RBI-VH-CG with 5 ports (4 to UCB, 1 to UBB) and external PHY connection + + + +## Core Components + + + +### Control and Communication + +- **JTAG Interface**: Adafruit FTDI FT232H programmer adapter for board programming and debugging + +- **I2C Bus**: Raspberry Pi I2C connections (SDA, SCL) to FPGA pins AB3 and AB4 + +- **UART Interface**: Raspberry Pi UART connections (Tx, Rx) to FPGA pins R1 and R2 + +- **SPI Interface**: For flash memory and other peripheral communication + + + +### Power Management + +- **48V Distribution**: Up to 7A power distribution to UxB boards with galvanic isolation + +- **12V Distribution**: Up to 21A power distribution to FANCTL, IOBALR, IOBSYN boards with galvanic isolation + +- **Fan Control**: Three separate fan channels with current/voltage monitoring and PWM control + +- **Power Monitoring**: Current and voltage measurement capabilities for all power rails + + + +### Signal Routing + +- **Status & Control Signals**: Comprehensive signal routing to all test boards + +- **Synchronization Signals**: LVDS signals for precise timing synchronization + +- **Ethernet Interfaces**: MDI interfaces for network connectivity to test boards + + + +## Connector Architecture + + + +### POGO Connectors + +- **POGO20 Connectors**: For FANCTL, IOBALR, and IOBSYN boards + +- **POGO40 Connectors**: For UxB boards (40-pin connectors) + + + +### Specific Board Connectors + +- **IOBALR Connectors**: Dedicated connectors for IOBALR boards + +- **IOBSYN Connectors**: Dedicated connectors for IOBSYN boards + +- **FANCTL Connectors**: Dedicated connectors for FANCTL boards + +- **UBB Connectors**: Dedicated connectors for UBB boards + +- **UCB Connectors**: Dedicated connectors for UCB boards + + + +## Software and Control Interface + + + +### Raspberry Pi Interface + +- **GPIO Mapping**: Detailed pin mapping for Raspberry Pi GPIO connections + +- **I2C Interface**: Standard I2C bus for communication with peripheral devices + +- **UART Interface**: Serial communication for debugging and monitoring + +- **SPI Interface**: For flash memory and other peripherals + + + +### FPGA Control + +- **Signal Processing**: FPGA handles signal routing and control for all connected boards + +- **Protocol Handling**: Implementation of I2C, UART, and other protocols + +- **Timing Control**: Generation and handling of synchronization signals + + + +## Revision Information + + + +### Available Revisions + +- **Revision A**: Original design with specific component placements + +- **Revision B**: Updated design with changes to shunt resistors and other improvements + + + +### Schematic and Layout + +- **Schematic Files**: Available in repository for both revisions + +- **PCBA Orders**: Specific orders for each revision + +- **Firmware**: Firmware updates for different revisions + + + +## Test Board Compatibility + + + +### Supported Daughter Boards + +1. **UCBX86880001** (UCB) + +2. **UBBX86880001** (UBB) + +3. **FANCTL880001** (FANCTL) + +4. **IOBALR880001** (IOBALR) + +5. **IOBSYN880001** (IOBSYN) + +6. **BPLUNI880001** (BPLUNI) + + + +## Key Features + + + +### Power Distribution + +- Dedicated power distribution for different test board types + +- Current and voltage monitoring capabilities + +- Galvanic isolation for safety and measurement accuracy + + + +### Signal Management + +- Comprehensive signal routing to all test boards + +- JTAG interface for programming and debugging + +- I2C, UART, and GPIO interfaces for communication + + + +### Monitoring and Control + +- Temperature monitoring (internal and external) + +- Sensor interfaces for inductive metal sensors + +- Fan control with PWM and monitoring + +- Power supply monitoring for external sources + + + +## Technical Specifications + + + +### Electrical Characteristics + +- Input Voltage: 12V DC + +- Power Consumption: Varies by connected boards + +- Signal Levels: 3.3V CMOS logic levels + +- Timing Accuracy: 25ppm crystal oscillator + + + +### Mechanical Specifications + +- Connector Types: IDC, POGO, and standard board connectors + +- Mounting: Standard PCB mounting + +- Dimensions: As defined in schematic documentation + + + +## Repository References + +- FPGA Implementation: ssh://git@b.yadro.com:7999/hwstait/tstuxb880001.git + +- Ethernet Switch: ssh://git@b.yadro.com:7999/hwstait/tstuxb880001.git and ssh://git@b.yadro.com:7999/hwstait/ucbx86880001.git + +- Power Supply Schematics: ssh://git@b.yadro.com:7999/hwstait/ucbx86880001.git + +- Fan Control: ssh://git@b.yadro.com:7999/hwstait/fanctl880001.git \ No newline at end of file