diff --git a/ATE B8B20/B8B20 Arhitecture.md b/ATE B8B20/B8B20 Arhitecture.md
index aa4a32d..aaa171c 100644
--- a/ATE B8B20/B8B20 Arhitecture.md	
+++ b/ATE B8B20/B8B20 Arhitecture.md	
@@ -46,18 +46,51 @@ HLBD Signal Path
 ![[pamb8b20_HLBD_signal.png]]
 1. Архитектура:
 	1. 2 канала TX на плате и 1 DPD
-	2. IC:
-		1. Bias Controller:
+	2. Power Supply:
+		1. 
+2. Интерфейсы PAM:
+	1. Connection to DM
+		1. 
+	2. IC of I2C Bus:
+		1. **Bias Controller**
 			1. BGMC1210E6327XUMA
 			2. Adr: 0x40
 			3. Управление смещениями для:
 				1. Amp CH1 и CH2 
 				2. PreAmp CH1 и CH2
-		2. EEPROM:
+		2. **EEPROM**
 			1. CAT24C256WI-GT
 			2. Adr: 0x50
-			3. 
-2. Интерфейсы:
+		3. **I2C Expander U36**
+			1. MCP23017T-E/ML
+			2. Adr: 0x20
+			3. Input 
+				1. PG_N7V0_BIAS_3V3
+				2. FLT_48V0_VDD_CH1
+				3. FLT_48V0_VDD_CH1
+				4. REFL_PROT_CH1
+				5. REFL_PROT_CH2
+			4. Output:
+				1. RST_REFL_TRIG_CH1
+				2. RST_REFL_TRIG_CH2
+				3. RST_REFL_FLT_CH1
+				4. RST_REFL_FLT_CH2
+			5. GPIO to DM
+			   
+		4. **I2C Expander U37**
+			1. MCP23017T-E/ML
+			2. Adr: 0x21
+			3. Input 
+				1. PG_N7V0_SAFE_TC_3V3
+			4. Output:
+				1. EN_VDD_AMPS_TX_CH1
+				2. EN_VDD_AMPS_TX_CH2
+				3. RST_BIAS_CTRL_CH1
+				4. SW_DPD12_3V3
+			5. GPIO to DM
+				1. EXP_RST_3V3
+
+3. Интерфейсы:
 	1.