From 6eac022490dc67c3dafd20fade8f4f649d1a3a95 Mon Sep 17 00:00:00 2001
From: Aleksey Baranov <al.baranov@yadro.com>
Date: Thu, 19 Mar 2026 11:49:19 +0300
Subject: [PATCH] vault backup: 2026-03-19 11:49:19

---
 4T4R FDD/DM - DMBPRD470101A.md | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/4T4R FDD/DM - DMBPRD470101A.md b/4T4R FDD/DM - DMBPRD470101A.md
index 662c0c1..030669c 100644
--- a/4T4R FDD/DM - DMBPRD470101A.md	
+++ b/4T4R FDD/DM - DMBPRD470101A.md	
@@ -18,6 +18,10 @@ Clock Distribution
 ![[Clock Distribution.svg]]
 1. Архитектура модуля:
 	1. Расположение интерфейсов TOP и BОTTOM ?
+	2. DM 
+	3. PA 
+	4. SWR
+	5. 
 2. Интерфейсы: 
 		1. PAM Интерфейсный коннектор - X2
 			1. 40 pin connector (Solepin) 66H8-F040S1118R01
@@ -35,7 +39,8 @@ Clock Distribution
 				4. ALERT_PA_CH2_3V3
 		2. SWR - коннектор
 			1. 40 pin connector (FX27-40S-0.8SV)
-			2. Power:
+			2. Power: 3V8 
+			3. I2C
 		3. Необходимость наличия крышки над платой.
 
 ---